Title
FPGA implementation of Alamouti Space-Time Coding
Currently, multiple-input and multiple-output (MIMO) wireless antenna configurations set out to replace the old single-input and single-output (SISO) wireless antenna configurations for throughput demanding applications. Various designs of the decoder for Alamouti's space-time coding scheme, which is one of the MIMO wireless antenna configurations coding, were being implementated on FPGA with VHDL and analyzed. The resource utilizations and performance of them were examined and recommendations for future developments of MIMO on FPGA were made.